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Sensors 2021, 21, 3119 15 of 23 took to verify a signature was 165.7 ms. The hashing operation that has to be done prior to the signature verification depends, of course, on the code size of the stage to be verified. The FSB on the ESP32 can occupy around 15–17 KB [35] and hashing it took around 2.5 ms. On the other hand, the size of the operating system kernel OSMAN can vary depending on the features required by the application context. For example, the Moongose OS operating system [36], with several features for enhanced IoT devices, can occupy at least 113 KB and hashing a code of that size took 19.5 ms. Therefore, the signature verification was the slowest operation in the secure boot process. In previous works [16,37], the internal SRAM of the ESP32 microcontroller was evalu- ated as a PUF, considering as the most stable (STB) cells the SRAM cells whose start-up value did not change in 20 consecutive measurements. Table 6 summarizes the experimen- tal results. Three different boards were used, and the experiments were done in nominal operation conditions. Note that the majority of SRAM cells are stable cells that do not show bias. For evaluating PUF uniqueness and reproducibility, the average fractional Hamming distance was used as follows: distH 2k−1k n =n·k·(k−1)·∑ ∑distH(Ri,Rj), avg i=1 j=i+1 where distH is the Hamming distance, n is the number of bits of the responses, and Ri and Rj are PUF responses. Inter-Hamming distance (from PUF responses from different SRAM cells) was used to evaluate PUF uniqueness, and intra-Hamming distance (from PUF responses from the same SRAM cells) was used for PUF reproducibility. Since the average inter-Hamming distance was nearly 0.5, this confirmed PUF uniqueness. Since the average intra-Hamming distance was very close to 0, this showed that PUF reproducibility was fairly good. It was concluded that a repetition error correcting code of length 8 was sufficient to properly recover a 256-bit obfuscated secret seed. Hence, 2048 ID (STB) cells were needed [16]. Table 6. Summary of experimental results of SRAM PUFs and TRNGs in ESP32 [16,37]. Experiment No. SRAM cells evaluated per board No. STB cells (min.) Bias in STB cells No. SRAM cells per PUF response No. PUF responses Avg. intra fract. Hamming dist. Avg. inter fract. Hamming dist. No. RND cells Min. entropy (%) Result 237,320 199,514 No 2048 291 (3 × 97) 0.0025 0.4921 724 69.52 The most unstable (or RND) cells of internal SRAM of the ESP32 microcontroller were also studied. Having performed 20 measurements, those cells had a start-up value of “0” half of the time and “1” the other half of the time. Since they provided the minimum entropy shown in Table 6, 369 RND cells were needed to generate a 256-bit random sequence with full entropy (256/0.6952 cells) [37]. After 20 readings of SRAM start-up values, the device generates the IDMASK and RNDMASK. Although this classification process is slow, as shown in Table 7, it is only executed once previously to use the device and create the token, and this allows accelerating the processes that should be repeated afterwards. The device uses the RNDMASK to obtain a secret seed. Using the secret seed and a hash, the IoT device generates its 32-byte private key. It is encoded with the 8-bit repetition error correction encoder, and the result is XORed with the start-up values of 2048 ID cells to produce the helper data HDDEV.PDF Image | Binding IOT to Smart Non-Fungible Tokens Using PUF
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