Upper set point?
+
QRef
Figure 8-8: Structure of the proposed superimposed stack voltage controller
In this work, the controller is activated, if the stack voltage exceeds 65.6 V during a charging process or falls below 44.4 V during a discharging process. It then tries to maintain these voltages as long as possible by increasing the flow rate. Both set points correspond to a 400-mV buffer to the respective absolute voltage limits (10 mV per cell).
The gains for the proportional and integral parts of the controller are equal for both the controllers for the charging and discharging operation.
For a 40-cell stack, a proportional gain of 100 L(Vs)-1 and an integral gain of 13.3 L(Vs2)-1 is heuristically determined. To illustrate these gains, let us consider the following example. If the stack voltage limit is exceeded by 20 mV (0.5 mV per cell) during the charging process, the proportional part of the controller instantly applies a flow rate of 120 Lmin-1. If this violation lasts for 10 seconds, the integral part of the controller adds another 160 Lmin−1. With these controller parameters, the controller quickly reacts on small violations of the upper and lower controller set point. Hence, it prevents the violation of the absolute voltage limits as long as the pump capacity is not fully exploited.
During the normal operation, the controller integrator is permanently reset. It receives the currently applied flow rate as an initialization value. This guarantees for a smooth transition between normal operation and voltage control mode.
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