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Combining with Equation 1, these results suggest an es- timate of profit in the face of approximation: p ̃(t,f)=H ̃(f)·Y(t)−P ̃(f)Ce(t) (3) 60·60 3.3 Functional Approximation To identify what component(s) in the hashing pipelines should be approximated, we analyzed the critical paths in the two hashing pipelines (Section 2.3.1). The critical path of both pipelines are equal and drawn as dashed lines in Fig- ure 2. The Expander’s delay is delay(σ0)+2·delay(CSA)+ delay(CP A), and the Compressor’s delay is delay(CP A) + delay(Maj) + 2 · delay(CSA). Furthermore, we observe the critical path through the carry-propagation logic of CPA dominates the other terms. Thus, the carry-propagate adders (CPA) are good candidates for approximation as proposed by [8]. In general, adder designs provide a trade-off between area and delay. For example, an n-bit ripple-carry adder (RCA) propagates signals in O(n) time with O(n) area, but cer- tain carry-lookahead adders (CLA) propagate in O(log2(n)) time with O(nlog2(n)) area, reducing delay but increasing area [9]. The parallel prefix form Kogge-Stone adder (KSA) minimizes delay at the expense of area [7]. A 16-bit Kogge- Stone parallel prefix graph is pictured in Figure 3. The graph’s breadth is proportional to the adder’s width n, and its depth (propagation delay) is O(log2 n); as a result, its area grows as O(nlog2(n)). Since hash rate is inversely pro- portional to delay as well as area (Section 2.3.2), we con- sidered all three adders — RCA, CLA, and KSA — as the baseline adder implementations. Approximate variants of these base adders retain their trade-offs but reduce the delay and area by an additional factor at the expense of inaccuracy. The basic principle of approximate addition is that carry propagation chains longer than a certain length are a rare event [14]. By allow- ing certain carry propagation patterns to generate erroneous sums, the logic may be simplified, reducing area and delay. This approximation entails that certain valid mining solu- tions will not be discoverable by an approximate miner. However, only a small number of approximate adder vari- ants will be interesting. Bitcoin mining is particularly sensi- tive to errors in addition. The sensitivity derives from three CPA modulo 32-bit additions each iteration, so there will be 64 · 3 = 192 additions in a single round of SHA-256, each with error rate ECPA. The error rate of a single round in the hashing core, therefore, is: Ef =1−(1−ECPA)192 (4) If the Ef target is 2%, ECPA cannot be higher than 10−4. This result limits the choices of approximate adders suitable for mining. We consider two approximate adder designs in this work. In [15] rearranging carry-lookahead logic of a CLA adder is proposed to construct a reconfigurable adder. This gracefully- decaying adder (GDA) may be configured for a certain area- delay tradeoff. We select the GDA(1,4) configuration with a 16-bit carry chain as it lowers the error rate to an acceptable threshold. We also consider an approximate KSA design [7]. Inspect- ing the graph structure in Figure 3, the maximum length of carry propagation k of an n-bit KSA (k = n for an accurate Figure 3: KSA Parallel Prefix Graph (n=16) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 k=1 k=2 k=4 k=8 k=16 adder) doubles at each level of the graph. Thus, pruning the lower levels reduces the length of carry propagation, de- creasing area and delay. Inputs that generate more than k consecutive carries7 will produce erroneous outputs. We consider KSA16 and KSA8 implementations. 4. METHODOLOGY 4.1 Simulation Various approximate and non-approximate versions of the hashing core—one expander and one compressor pipeline per core—were implemented using System Verilog and synthe- sized using Synopsys Design Compiler [4] and a 65nm TSMC GP cell library. Place and route was performed using Ca- dence SoC Encounter [1]. The hashing cores differ in their choice of the adder replacement for the CPAs in their data- path. 4.1.1 Functional An analytical derivation of the approximate adders’ error rate EC P A is not straightforward [14]. Instead, Monte Carlo simulations were performed with uniform random inputs (≈ 1 million samples), a confidence interval of 95%, and 5% relative error. The results are listed in Table 1. 4.1.2 Operational In addition to simplifying logic through functional approx- imation, approximation can also be performed by tolerating occasional timing violations. Instead, a Better Than Worst- Case (BTWC) operation can be allowed. We estimate the operational error rate Eo(f) for each adder configuration through simulation at variable frequency. At each discrete frequency step, SDF files generated by place and route were used to perform gate-level timing simulations in ModelSim- Altera [3]. Monte Carlo simulations were performed as be- fore. During simulation, the resulting hash vectors were compared against the correct values to determine the error rate at each frequency. 4.2 Profit Model While it is possible to derive profits directly from our de- signs in Table 2, the calculated profit values may not be cred- ible since the designs neglect the optimizations that com- mercial mining ASICs may perform. Instead, we select an existing commercial ASIC for profit calculations. We choose a Bitmain BM1385 [2] with hash rate of H0 = 38.8 GHash/s and power consumption of P0 = 10.2 W at nominal fre- quency and voltage. We assume that the ASIC is imple- mented using a KSA32 design since KSA32 minimizes the hashing pipeline’s delay-area product (Table 2). To deter- mine how profits change between adder designs, we calculate 7We denote these adders as KSAk.PDF Image | Approximate Bitcoin Mining
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